Control apparatus



United States Patent Inventor Fred Karwacki Hopkins, Minn. Appl. No.652,195 Filed July 10, 1967 Patented Dec. 29, 1970 Assignee HoneywellInc.

Minneapolis, Minn. a corporation of Delaware CONTROL APPARATUS 7 Claims,2 Drawing Figs.

US. Cl 307/246, 307/252, 307/255 Int. Cl H03k 17/00 Field of Search307/239, 246. 243, 244, 288, 255, 253

[56] References Cited UNITED STATES PATENTS 3,160,766 12/1964 Reymond307/255 2,890,353 6/l959 Overbeek et al. 307/288X 3,023,323 2/l962Kojalowicz 307/288X 3,139,539 6/1964 Hewett 307/288X 3,38l,l46 4/1968Egan 307/252UX Primary ExaminerDonald D. Forrer Assistant Examiner-B. P.Davis Allorneys- Roger W. Jensen, Charles J. Ungemach and Bruce C. LutzABSTRACT: A circuit for providing a positive output pulse upon eitherthe opening or closing of a switch which provides either positive ornegative going input signals to the circuit.

CONTROL APPARATUS THE INVENTION This application generally relates toelectronic circuitry and more specifically to circuitry for providing anoutput pulse of a given polarity direction in response to input pulsesof either polarity direction.

Other switches for accomplishing the same general function as outlinedabove have been presented in the past but it is believed that thepresent invention accomplishes the desired result better and moreefficiently than previously designed switches.

It is therefore a general object of this invention to provide improvedswitching apparatus.

Further objects and advantages of the present invention will be apparentfrom a reading of the specification and appended claims in conjunctionwith the drawings wherein:

FIG. 1 is a circuit diagram of the invention; and

FIG. 2 is a partial circuit schematic which may be used in place of aportion of FIG. 1. In FIG. 1, a battery generally designated as has apositive terminal 12 which is connected to one stationary contact 14 ofa switch generally designated as 16 having a movable contact 18. Thenegative terminal of battery 12 is connected to one end of a resistor 20and to a terminal 22 of a dashed line box generally designated as 24.The other end of resistor 20 is connected to movable contact 18 and alsoto one end of each of two energy storage means or capacitive means 26and 28. The movable contact 18 of switch 16 can be altered between openand closed positions. Contact 14 is also connected to a terminal means30 on the edge of dashed line box 24 and is common with another terminal32 on the opposite side of box 24. A resistance means 34 is connectedbetween terminal 22 on one side of dashed line box 24 and a terminal 36on the other side thereof. The unconnected electrodes of capacitors 26and 28 are connected respectively to terminal means 38 and 40 on theside of box 24. A resistive means 42 is connected between terminals 30and 38. A PNP transistor generally designated as 44 has an emitterconnected to terminal 30 while a collector is connected to terminal 40and a base thereof is connected to terminal 38. An NPN transistorgenerally designated as 46 has its base connected to terminal 40 whileits collector is connected to terminal 38 and its emitter is connectedto a final output terminal 48 on block 24. A resistor 50 is connectedbetween terminals 48 and 36.

The transistors 44 and 46 constitute a four-layer semiconductor devicewhich in some instances is referred to as a PNPN semiconductor. When thetwo transistors are commonly connected within one container the deviceis also known as a silicon controlled switch. This configuration is alsosubstantially the same a that used for a silicon controlled rectifier(SCR) except that a SCR only uses one of the two base terminals. While aPNPN device is shown, for the opposite polarity signals and voltagesupplied potentials, a NPNP four layer device could equally well beused.

A transistor or switch 52 has its base connected to terminal 48 whileits emitter is connected to terminal 36. A load 54 is connected betweenterminal 32 and a collector of transistor 52. A capacitive means 56 isconnected between terminals 32 and 36.

The circuit shown in FIG. 2 can be used to replace the block 24 of FIG.1 and the corresponding terminals are numbered exactly the same in FIG.2 and are placed in similar positions. However, each of thesecorresponding numbers is designated with a prime so as to differentiateFIG. 2 from FIG. 1. A PNP transistor generally designated as 75 has itsemitter connected to terminal 30 while its base is connected to terminal38. A collector of transistor 75 is connected to a base of an NPNtransistor 77 which has its emitter connected to terminal 22 and itscollector connected to a base of a PNP transistor generally designatedas 79 and also to a collector of an NPN transistor generally designatedas 81. Transistor 79 has its emitter connected to terminal 30' while itscollector is connected through a resistor 83 to terminal 22'. A resistor85 which corresponds in function to resistor 34 is connected betweenterminals 22 and 36'. The transistor 81 has its base connected toterminal 40 while its emitter is connected to terminal 22. An SCR orfour-layer semicondctor means 87 has its anode connected to terminal 30while its gate is connected to the collector of transistor 79. Thecathode of SCR 87 is connected to terminal 48'. A resistor 89 isconnected between terminals 48' and 36' and corresponds to resistor 50of FIG. I.

OPERATION In operation, the capacitor 56 charges to the potential ofsupply 10 through resistor 34. It will be assumed that the switchutilizing transistors 44 and 46 is OFF initially. The switch 16 is thenoperated to its closed condition and this suddenly raises the potentialof contact 18 in an upward or positive polarity direction. This willquickly raise the potential at the bases of the two transistors 44 and46 through capacitors 26 and 28 respectively. However, a positive pulseat the base of transistor 44 will be disregarded. The positive pulse atthe base of transistor 46, however, will actuate this transistor andturn the transistor to an ON condition. By feedback through the twotransistor devices, the lowering of the collector of transistor 46 willactuate transistor 44 to keep the combination in an ON condition. Theturn-on of transistor 46 will provide a positive going pulse at terminal48 so as to actuate transistor 52. When transistor 52 turns ON, there isa short circuit produced between the load 54 and the capacitor 56 sothat capacitor may discharge its energy into load 54. When capacitor 56is sufficiently discharged, the voltage thereacross and thus the voltageacross the combination of transistors 44 and 46 is so low that thecombination switch is starved to an OFF condition. By definition in thisspecification, a positive going or unidirectional output pulse is meantto define the leading edge of the pulse. In other words, the voltage atjunction point 48 is normally at ground potential and when transistor 46turns ON, the voltage at junction point or terminal 48 suddenly rises inpotential although it will fall to ground potential again as soon ascapacitor 56 discharges. Also, by definition, the input signals fromswitch 16 are bidirectional in that sometimes the leading edge ispositive going and sometimes it is negative going.

One example where the leading edge of the signal from switch 16 would benegative going would be in a condition opposite that considered above.In this instance, the switch including transistors 44 and 56 is OFFwhile capacitor 56 is charged and switch 16 is changed from thepreviously mentioned closed condition to an open condition. Thepotential at contact 18 will suddenly be lowered in potential so as toprovide negative pulses through capacitors 26 and 28 to the bases oftransistors 44 and 46. A negative going'pulse will not actuatetransistor 46 but it will actuate transistor 44. When transistor 44turns ON, its collector will rise in potential and actuate transistor 46thereby producing apositive going pulse at terminal 48 with respect toterminal 36. Again, transistor 52 will turn ON allowing capacitor 56 todischarge and thereby turn OFF the four-layer semiconductor switch.

Referring now to FIG. 2 it will be noted that while the circuit issomewhat similar to the circuit shown within block 24 of FIG. 1, thecircuit utilizes an SCR as the four-layer semiconductor means andreplaces one resistor with another resistor and four transistors. Thecircuit as shown in FIG. 2 is simpler to produce in integrated circuitform and is another embodiment of of the basic invention. If negativegoing pulses are applied at terminals 38' and 40', only transistor willbe actuated. The actuation of transistor 75 will actuate transistor 77which in turn actuates transistor 79 and thus produces a positive pulseto turn SCR 87 to an ON condition and thereby produce a positive goingoutput pulse at terminal 48' with respect to terminal 36'.

If two positive going pulses are applied at terminals 38' and i 40,transistor 81 will be actuated thereby actuating transistor As'will berealized by those skilled in the art, resistors 34 and 85 are of such avalue that capacitor 56 can normally charge to the full potential of theload between repositioning of switch 16 or between the occurrence ofpositive and negative going pulses to the circuit in the event that adevice other than switch 16 is used to produce the pulsessHowever, theimpedance of these two resistors is large enough that the SCR or PNPNswitch is starved to an OFF condition by the rapid discharge ofcapacitor 56 through the load 54 upon each occurrence of discharge ofthis capacitor.

While I have shown two embodiments of my invention 1 do not wish to belimited to the embodiments shown but only by the scope of the appendedclaims which describe the use of a two-energy storage means network for.receiving either positive or negative going pulses to actuate afour-layer semiconductor means.

I claim:

l. A circuit for providing a unidirectional output pulse in response tobidirectional sudden changes in input voltage comprising, incombination: t

input means for providing bidirectional rapidly changing input signals;

four-layer semiconductor means including signal input means; I

impedance means connected in series combination with said four-layersemiconductor means;

power supplying means connected for supplying power across said seriescombination; v

first and second capacitance means for supplying positive and negativepulses, connected between said input means and said semiconductor meansfor actuating said semiconductor means to an ON condition for each rapidchange in input potential; and

output means connected to supply unidirectional output pulses from saidsemiconductor means.

2. Apparatus as claimed in claim 1 wherein said impedance means has anintermediate terminal means and the output means is connected betweensaid semiconductor means and said terminal means. 7

3. Apparatus as claimed in claim 2 comprising in addition:

load means; and

switch means connected in series combination with said load means andconnected to said output means for receiving therefrom unidirectionalactuating signals.

closing of a monitored switch having at least first and second contactsand means or closing and opening an electrical path therebetweemsaidapparatus comprising:

"first and second terminals for connection respectively to said firstand second contacts of said monitored switch; power supply means havinga first polarity end connected to said first terminal and having asecond polarity end connected through an impedance to said secondterminal; controlled switch a means connected across said power supplymeans for opening and closing a series current path between said powersupply and a load, said controlled switch means having first and secondcontrolled inputs for receiving positive and negative pulsesrespectively, said controlled switch means being operable to close saidseries current path between said power supply means and said load uponapplication of a positive pulse to said first controlled input and alsoupon application of a negative pulse to said second controlled input;and first and second capacitor means connecting said second terminalrespectively to said first and said second controlled inputs of saidcontrolled switch means, whereby upon opening of said monitored switch apulse of a first polarity is presented to said first and secondcontrolled inputs of said cont-rolled switch means and upon closing ofsaid monitored switch a pulse of a second polarity is presented to saidfirst and secondcontrolled inputs of said controlled switch means.

7. Apparatus as claimed in claim 6 comprising, in addition energystorage means connected across said controlled switch means, fordischarging though said load upon closing of said series current pathbetween said power supply means and said load, to deactivate saidcontrolled switch means.

